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SoC Design Engineer Design for Debug Validation

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Company :
Intel corporation

Location :
Hillsboro, Oregon

Expiry Date :
Fri, 06 Nov 2020 23:59:59 GMT

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Description :
Job_Description

Come join Intel’s Devices Development Group organization as a SoC Design
Engineer focused on Design for Debug (DFD) Validation.

As a member of the product team, you will work firsthand with multi-function
teams/sites, implementing and validating state-of-the-art debug solutions
appropriate for new and existing technology in the product.

In_This_Role_You_Will
* Work as part of a pre-silicon validation team for future Intel SoCs or
IPs, focusing on debug validation
* Work with pre-silicon and post -silicon validation teams to improve debug
features and tools suites
* Work closely with post-silicon validation SW teams on debug tool
validation and silicon enabling
* Pioneering new debug tools and flows, reviewing and publishing
architectural specs and supporting next-generation silicon enabling on
system platforms

Responsibilities_Will_Include_But_Not_Be_Limited_To
* Validation of DFD features (e.g. low & high-bandwidth signal tracing and
event triggering) using simulation, emulation, and/or FPGA
* Creating plans and tests for validating portions of a complex
microarchitecture using written specs, RTL code and other tests as a
guide
* Learning the Power Management, Memory and debug architecture and
microarchitecture by debugging failures to the root cause
* Developing and utilizing various debug and validation tools and/or
methodologies to implement validation plans with the goal being to ensure
a solid design
* Participating in the debug of failures on silicon and developing new
testing strategies to detect these failures on RTL models
* Developing high level (for example, System C) modeling for RTL components
* Developing debugging tools and software

In addition to the qualifications listed below, the ideal candidate will also
demonstrate having a proven record of working across validation teams to solve
problems

Qualifications

You must possess the below minimum qualifications to be initially considered
for this position. Preferred qualifications are in addition to the minimum
requirements and are considered a plus factor in identifying top candidates.

Minimum_Qualifications

Candidate must have a Bachelors degree in Computer Science, or Electrical/
Computer Engineering and 4+ years of industry experience- OR – a Masters degree
Computer Science, or Electrical/Computer Engineering and 3+ years of industry
experience

4+ years of experience with:
* Writing DFx validation plans and software to implement those validation
plans
* Reading and interpreting technical specs and Register Transfer Level
(RTL) code
* Programming languages/Scripting: C, Perl, Verilog and UNIX* or Linux*

3+ years of experience with:
* Computer architecture

Preferred_Qualifications

1+ years of experience with:
* Pre-silicon & Post-silicon track record of driving debug tools enabling &
validation, improvements and getting them adopted by others
* HW and SW Interaction and debug to root cause
* Working across validation, architecture, SW, and design teams to resolve
debug issues
Inside this Business Group

The Silicon Engineering Group is a worldwide organization focused on the
development and integration of SOCs, Cores, and critical IPs that power
Intel s leadership products. This business group leverages an incomparable
mix of experts with different backgrounds, cultures, perspectives, and
experiences to unleash the most innovative, amazing, and exciting computing
experiences.

Posting Statement

All qualified applicants will receive consideration for employment without
regard to race, color, religion, religious creed, sex, national origin,
ancestry, age, physical or mental disability, medical condition, genetic
information, military and veteran status, marital status, pregnancy, gender,
gender expression, gender identity, sexual orientation, or any other
characteristic protected by local law, regulation, or ordinance….

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